Method and system for controlling printout elements in a printout mechanism

ABSTRACT

The printout of a first and second printout element to be activated consecutively is controlled by storing a corresponding first and second location dependent selection signal and obtaining the difference therebetween. The second printout element is then activated after a time period following activation of the first printout element which depends upon this difference in selection signals.

United States Patent Inventor Klaus Jiirg Becker 6242 Schonberg/Uher,Kronberg, Germany Appl. Nov 813,996 Filed Apr. 7, 1969 Patented Nov. 2,1971 Priority Apr. 5, 1968 Germany P 17 74 093.1

METHOD AND SYSTEM FOR CONTROLLING PRINTOUT ELEMENTS IN A PRINTOUTMECHANISM 8 (Ilalms, 1 Drawing Flg.

U.S. Cl 340M715, 197/20 Int. Cl G041: 23/00, G05b 19/32 Field of Search.1 [97/20, 9,

14, 17.98, 107, 19 13; IMO/172.5

[56] References Cited UNITED STATES PATENTS 2.870396 1/1959 Riffel197/17 2995231 8/1961 Von Kummer et al. 197/20 3,091.320 5/1963 Mertn197/13 3,270.853 9/1966 Get-jets et al.... 197/98 3,340,987 9/1967Bastian 197/20 3,342.296 9/1967 Greene 197/20 Primary Examiner-Gareth D.Shaw Assistant Examinerlan E. Rhoads Attorney-Michael S. StrikerABSTRACT: The printout ofa first and second printout element to beactivated consecutively is controlled by storing a corresponding firstand second location dependent selection signal and obtaining thedifference therebetween. The second printout element is then activatedafter a time period following activation of the first printout elementwhich depends upon this difference in selection signals.

PATENTEU NW2 I97! INVENTOR UM: 708G lat 4,.- a m 1.1511,,

ATTORNEY METHOD AND SYSTEM FOR CONTROLLING PRINTOUT ELEMENTS IN APRINTOIJT MECHANISM BACKGROUND OF THE INVENTION This invention relatesto a method and system for controlling the activation of printoutelements in data processing installations. In particular the printoutelements in data processing arrangements wherein punched tapes are usedare covered in this application. In such a machine, for example, datamay be supplied by means of a tape which has holes punched therein, suchholes representing, in combination, different letters or numbers.Signals scanned or readout from such a tape may then be used to controlthe operation of a type bar. In such a system each number or letter isassociated with a particular one of said code or hole combination.

Because of the arrangement of the type bars in typewriters the time ofactivation of each of the type bars must be set so that no interferenceresults between consecutively operated type bars. If the type bars liein a circular are, these type bars may be divided into difi'erent groupsaccording to their position within the are so that, for example, thetime interval between activation of type bars of the same group may bemade longer than that between type bars located in different groups.Thus the time interval between the activation of consecutive type barsmust vary with the relative location of said type bars, thus, if, forexample, the same type bar is to be activated twice in succession, theinterval between successive activations must be long, since the type barmust return to its original position prior to the subsequent activation.

Some methods and arrangements are already known for controlling the typebar activation in such a manner that the operating speed of thetypewriter or other printout mechanism is increased over that whichwould result if the maximum interval between successive operations wereused throughout. In such known arrangements, which operate using timecriteria, either individual-type bar activators or groups of suchactivators have more or less fixed time intervals assigned betweenactivations.

SUMMARY OF THE INVENTION It is an object of the invention to furnish amethod and arrangement for activation of type bars which permits the useof a minimum time interval between activations in dependence on therelative location of two consecutively activated type bars.

For purposes of this invention, it is assumed that the scanning of thetape or other input means immediately yield, the code of the type bar tobe activated, so that the location of the type bar to be activated isdetermined prior to the actual activation of said bar.

The invention set forth herein is thus a control system for printoutmechanisms having printout elements arranged in predetermined locations,the minimum time interval required between activation of two consecutiveprintout elements dcpending at least in part on the relative location ofsaid element. The invention comprises a plurality of selection signalgenerating means which generate a different selection signal dependingon the respective location of said printout elements. The selectionsignals for a first and second printout element to be operatedconsecutively are stored and compared. A difference signal is generatedwhich depends upon the difference between said selection signals.Further, timing means are provided for furnishing a plurality of timingsignals at predetermined time intervals after activation of the first ofsaid two consecutive printout elements. One of said timing signals isthen selected in dependent; upon said difference signal. The activatingmeans for activating the second printout element are then energized uponreceipt ofthe selected timing signal.

In a particular embodiment of the invention the selection signals may betwo voltages which were respectively derived from a digital to analogconverter whose inputs were the first and second code combinationsignals corresponding to the first and second elements to be activated.

The comparator means may be a differential amplifier, while theabove-mentioned proportional voltages may be stored on capacitors. Thedifference signal derived from the differential amplifier may beevaluated by means of a plurality of threshold circuits, each set for adifferent predetermined value. The timing means may comprise a pluralityof monostable multivibrators, each set for a different timing interval,all started upon activation of the first type bar. The selection of theparticular timing interval may then take place by means of a pluralityof AND gates, each combining one combination condition of the thresholdcircuit outputs with a corresponding one of the timing signals generatedwhen a particular monostable vibrator changes back to its stablecondition.

The novel features which are considered as characteristic for theinvention are set forth in particular in the appended claims. Theinvention itself, however, both as to its construction and its method ofoperation, together with additional objects and advantages thereof, willbe best understood from the following description of specificembodiments when read in connection with the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWING The FIGURE is an overall diagram of thecontrol circuit in accordance with this invention.

DESCRIPTION OF THE PREFERRED EMBODIMENT The preferred embodiment of thisinvention will now be discussed in relation to the FIGURE.

It is assumed that the input signals, which signify the type bar to beactivated (or character to be printed) are furnished at inputs 1 through8, which are respectively connected to the reset inputs of flip-flopsFFl through FF8. The set inputs 8 of these flip-flops are connected incommon to line 24 which is connected to one output of the monosta bl emul tiv ibratg M6 via lines 33b and 33. The 0 output lines I, 2, 3, 4, 6and 7 corresponding to the reset inputs R, are connected in common tothe input ofa digital analog converter D/A. The outputs of theflip-flops F Fl-FFS which correspond to a set input S, are furnishedfrom the corresponding 0 output lines via an amplifier and inverter.

The digital to analog converter D/A does not necessarily have to performa correct mathematical conversion. It may be tailored to the particularrequirements of the circuit in which such mathematical proportionalityis not essential. All the O outputs of flip-flops FFI-FF7 are connectedto the inputs of this analog to digital converter. The output of thedigital to analog converter is connected to the control circuitry, and,in particular to contact pairs at and b which are relay contactscontrolled by relays A and B respectively. Contact a is connected, whenclosed, to line 43, while contact b is connected to line 44 when closed.Lines 43 and 44 are in turn connected to the first and second input ofthe differential amplifier, denoted by DV in the FIGURE. Lines 43 and 44are further respectively connected to capacitors C2 and CI the otherterminal of which are connected in common to the positive voltage supplysource.

The output of the differential amplifier DV is connected in common tothe set inputs S of flip-flops FFI, FFIZ, and FF13 via line 42a. Thereset inputs of these flip-flops are connected in common, via line 41 tothe output ofa multivibrator M5. As per the Figure, the L outputs offlip-flops FF 11-FI-l3 respectively are each connected respectively tothe input of an inverter amplifier V4, V6, and V8, which in turn areconnected to inverter amplifiers V5, V7, and V9. Obviously the out at ofinverter amplifiers V4, V6, and V8 constitute their? outputs offlip-flops FFll, FFIZ and FFI3 respectively while the outputs V5, V7 andV9 respectively represent the L outputs of FF! l-FFI3.

Multivibrator MS is controlled via line 40 from the output ofmultivibrator M7. Line 40 is also connected to one of the inputs each ofAND gates U5 and U6. The second inputs of AND gates U5 and U6respectively are connected to the 0 outputs of flip-flop FF9. One 0output is connected with AND gate U5, while the other is connected toAND gate U6. Flipflop FF9 is constituted to yield an output at the twooutputs alternately, upon receipt of pulses on line 39. One of the 0outputs controls relay A via amplifier V2 which is preceded by aninverter, while the 0 output of AND gate U6 controls relay B viaamplifier V3 and its corresponding inverter, as will be furtherexplained below.

The inputs of monostable multivibrator M7, flip-flop FF9 and one inputof flip-flop FF10 are connected in common to line 39. Line 39 isconnected to line 45, which receives a signal from the output of thereadout arrangement (not shown) over terminal ST, when a codecombination of the tape is under the scanning element. This correspondsto the so-called "stop" operation. The output of flip-flop FF10 yields atrigger pulse for AND gates U, through U which will be described below.The second input of flip-flop FF10 is connected to line 22 via line 28.Line 22 is connected to the inputs of multivibrator Ml-M4. Line 22 isfurther connected to the output of OR gate 02 via line 21.

OR gate 02 has a first input connected to the output of flipfiop PMS anda second input connected to the output side of multivibrator M8.Flip-flop FFlS has a set input connected to the input of AND gate U8which in turn has an input connected to the output of flip-flop FF7 anda second input connected to the output of flip-flop FF8. The otherinput, namely the reset input of flip-flop FFlS is connected to acarriage return control circuit comprising a line 46 connected to thepositive voltage supply and a line 47 connected to the negative voltagesupply terminal. Line 46 is connected to a switch whose second contactis connected to the reset input of flipflop FFIS. Line 47 is connectedto a relay designated R] which, on its other side, is also connected tothe reset input of flip-flop FFlS. The switch in line 46 is labeled CRand is the carriage return switch.

Multivibrator M8 is fed via a two-stage amplifier Vl. This amplifier V1is preceded by an AND gate U7 which has a first input connected to adifferentiator D6 and a second input connected to receive a signal atthe start of operation. The input to the differentiator D6 is connectedto line 33b.

One out ut of multivibrator M1 is connected to an input of AND gate Ulvia line 26. The other output is connected via line 27 to the controlsystem for the readout means and serves to activate said readout means.Line 29 connects the output of the multivibrator M2 with one input ofAND gate U2. A similar connection is made via lines 30 and 31 betweenthe outputs of multivibrators M3 and M4, and the inputs of AND gates U3and U4. The output lines 35, 36, 37 and 38 of AND gates U1, U2, U3 andU4 respectively are connected to the input of OR gate 01 which isfollowed by an inverter. The output of OR gate 01 is connected tomultivibrator M6 via line 34. One output of multivibrator M6 isconnected via lines 33 and 33a to the type bar activators or thecorresponding positions in the decoding matrix, and via lines 33 and 33bto the set input 5 of flip-flops FFl-FFB connected in common to line 24.The other output of this multivibrator is connected via line 23 with theinput of multivibrator 24 and further, via line 25, with one inputofmultivibrator M3.

The above described circuit operates as follows:

At the beginning of the operation, a start signal is applied at terminalSE, thus fulfilling the necessary conditions to yield an output at ANDgate U7, since the voltage at the other input is absent. The output ofAND gate U7 in turn causes multivibrator M8, having a time constant of 1millisecond to be flipped to its unstable state. The output of themultivibrator furnishes the signal to OR gate 02, which in turnfurnishes a signal via lines 21 and 22 to multivibrators Ml-M l, and vialine 28 to set input S of flip-flop FF10. The outputs of multivibratorsMl-M4 are of course connected to the first inputs of AND gates Ul-U4 vialines 29, 30 and 31. Further the output of multivibrator Ml starts thereadout via line 27. It should be noted that multivibrators Ml-M4constitute timing means for furnishing a plurality of timing signals atpredetermined time intervals after activation of the previouslyactivated printout element. These multivibrators thus have differenttime constants as follows:

M l=20.5 ms.

M2=30.5 ms.

M4=58.S ms.

M6=25.0 rns.

M7=3.0 ms.

The timing signals of course are derived from multivibrators Ml-M4. Thevalues of the other multivibrators are furnished here only for laterreference.

When the desired code is under the reader, a signal is furnished toterminal ST indicating the so-called "stop" operation. This causesmultivibrator M7 to be switched to its unstable state. Simultaneouslythe applied pulse causes a triggering of flip-flop FF9 and the resettingof flip-flop FF III. This causes either AND gate US or AND gate U6 togenerate the pulse required for activation of either relay A or relay 8respectively. This occurs because the output of multivibrator M7furnishes the necessary input for the AND gates US or U6 which in turnactivate relays A and B respectively. Further, the output ofmultivibrator M5 is applied to the reset inputs R of flip-flopsFFll-FFl3 via common line 41, thus causing these flip-flops to be reset.lf now for example relay A has been activated, contact a will be closed.A signal derived from the tape is applied via flip-flops FFlFF7 to theinputs of the digital to analog converter D/A. The voltage furnished bydigital-analog converter DIA in response to this input code signal isthen applied to capacitor C2 via this now closed contact a. The voltageresulting on capacitor C2 is the selection signal corresponding to thefirst printout element to be activated. The charging of capacitor C2continues until the following pulse is received at terminal ST whichcauses the flipflop FF9 to flip to its second output causing activationof relay 8 and deactivation of relay A. Upon deactivation of relay A thevoltage stored on capacitor C2 is applied to the differential amplifierDV. The output of differential amplifier DV is applied to the set inputsof flip-flops FFll, FF12, and FFl3. Each of these flip-flops is adjustedto set for different threshold values, or different minimum voltagesapplied to their respective set inputs. It will be noted that differentcombinations of L or 0 conditions at the outputs of flip-flops 11-13 areapplied to the inputs of AND gates U1, U2, U3, and U4. These differentcombination conditions furnish inputs of each of the AND gates U1, U2,U3 and U4. The input labeled W on each of the above-mentioned AND gatesis furnished by the output L of flip-flop FF10 via line 48 which signalsappear in synchronism to the inputs applied via the outputs of flipflopsFF8 to OR gate U8. The fifth input to each of the AND gates Ul-U4 isapplied, respectively from the output of multivibrators M l-M4. TheseAND gates thus serve as means for selecting a timing signal as afunction of the difference signal which is the output of thedifferential amplifier DV. The particular selected one of AND gatesUl-U4 then furnishes a signal to OR gate 01 which is followed by aninverter and in turn controls multivibrator M6 which has a time constantwhich is approximately 25 percent greater than that of multivibrator M1.The output signal of M6 then causes the energization of thecorresponding position in the decoding matrix for activating the typebars. This pulse controlling the active tion of the type bars is appliedto the decoding matrix via lines 33 and 33a. The timing of theactivation of the type bar has thus been made dependent upon thedifferential amplifier output signal, which in turn depends upon thedifference between the selection signals for two type bars to beactivated in succession. At the same time at which the signal whichcauses the activation of the type bars is generated, the differentiatorD0 is energized via line 33b and flip-flops FFl-FF8 are reset via line24. A further output of multivibrator M6 causes the resetting ofmultivibrators M3 and M4 which have the largest time constants, in casethese have not already reset.

The output of differentiator DG causes the setting of multivibrator M8via the two stage amplifier VI. The output of multivibrator M8 in turncauses multivibrators M1-M4 to be switched to the unstable state via ANDgate 02. The next signal received at terminal ST then again causes aflipping of flip-flop FF9, causing relay 8 to be deactivated and itscontact b to be opened. The voltage on condenser Cl is the voltageproportional to the code read from the tape.

It may be seen from the above-described operating cycle that the fourmonostable multivibrators M1-M4 in connection with the thresholdcircuits represented by flip-flops FF! l-FFlJ determine the timing ofthe activation of the type bar corresponding to the code read out fromthe tape.

In order to avoid errors during long tape movements or during acorrective punching, the flip-flop F F9 prevents any operation until thesignal arrives at terminal ST which indicates that a usable code isbeing scanned.

During a carriage return the signal for starting the readout means areblocked via contact CR until this contact is again opened. Flip-flopFFlS is flipped for each output of AND gate U8.

While the invention has been illustrated and described as embodied inparticular types of logic circuits, it is not intended to be limitedthereto since structural and circuit changes may be made withoutdeparting in any way from the spirit of the present invention.

What is claimed as new and desired to be protected by Letters Patent isset forth in the appended claims:

1. In a printout mechanism having a plurality of printout elementsarranged in predetermined locations, :1 control system for activating aselected printout element a determined time interval followingactivation of the last previously selected printout element independence on the relative locations of said selected printout elementand said last previously selected printout clement, comprising, incombination for: storage means storing a first selection signal havingan amplitude corresponding to the location of said last previouslyselected printout element and for storing furnishing a second selectionsignal having an amplitude corresponding to the location of saidselected printout element; said selection signal furnishing meanscomprising means for generating a code combination signal correspondingto the location of said selected printout element, and digital-to-analogconverter means for converting said code combination signal to acorresponding analog signal; comparator means for furnishing adifference signal thus furnishing said selection selection signal,having an amplitude corresponding to the difference in amplitude betweensaid first and second selection signals; timing means for furnishing aplurality of timing signals at predetermined time intervals after saidactivation of said last previously selected printout element; means forselecting one of said timing signals as a function of the amplitude ofsaid difference signal, thus furnishing a selected timing signal; andactivating means for activating said selected printout element inresponse to said selected timing signal.

2. A system as set forth in claim 1, wherein said storage meanscomprises first and second capacitive storage means for storing saidfirst and second selection signals second selection signal; furthercomprising connecting means for alternately connecting said first andsecond capacitive storage means to the output of said digital-to-analogconverter means in such a manner that the voltage on said first andsecond capacitive storage means respectively constitutes said first andsecond selection signals.

3. Control system as set forth in claim 2 wherein said comparator meanscomprise differential amplifier means having a first input connected tosaid first capacitive storage means and a second input connected to saidsecond capacitive storage means.

4. A system as set forth in claim 3, wherein said means for selectingone of said timing signals comprises a plurality of threshold circuits,each connected to said differential amplifier means, each for generatina corresponding threshold signal when the amplitude of sai differencesignal exceeds the corresponding associated threshold value; whereinsaid timing means comprise a plurality of timing circuit means; andwherein said means for selecting one of said timing signals furthercomprises a plurality of gating means, each connected to a correspondingone of said timing circuits, each adapted to allow transmission of thecorresponding timing signal in response to a predetermined combinationof said threshold signals.

5. A control system as set forth in claim 4 wherein said gating meanscomprise AND gates.

6. A control system as set forth in claim 5 wherein each of said timingcircuit means comprises a monostable multivibrator.

7. A system as set forth in claim 6, wherein said connecting means foralternately connecting said first and second capacitive storage means tosaid digital to analog converter means comprises first and second relaymeans respectively having a first and second pair of relay contacts,said first and second pair of relay contacts, when closed, respectivelyfurnishing the connection between said digital-to-analog converter meansand said first and second capacitive storage means; means for furnishingsignals signifying the generation of a selection signal; and relayactivating means for alternately activating said first and second relaysin response to said signals.

8. In a printout mechanism having a plurality of printout elementsarranged in predetermined locations, a method for controlling the timeinterval between activation of a first and second printout element, independence on the relative location of said first and second printoutelements, comprising, in combination, furnishing a first digital signalcorresponding to the location of said first printout element; convertingsaid first digital signal to a first analog signal having an amplitudecorresponding to the location of said first printout element; storingsaid first analog signal; activating said first printout element;furnishing a second digital signal corresponding to the location of saidsecond printout element; converting said second digital signal to asecond analog signal having an am plitude corresponding thereto; storingsaid second analog signal; comparing said first and second analogsignals and furnishing a difference signal having an amplitudecorresponding to the difference in amplitude between said first andsecond analog signals; furnishing a plurality of timing signalsfollowing activation of said first printout element; selecting one ofsaid timing signals as a function of the amplitude of said differencesignal; and activating said second printout element in response to saidselected timing signal.

1' d t II t

1. In a printout mechanism having a plurality of printout elementsarranged in predetermined locations, a control system for activating aselected printout element a determined time interval followingactivation of the last previously selected priNtout element independence on the relative locations of said selected printout elementand said last previously selected printout element, comprising, incombination for: storage means storing a first selection signal havingan amplitude corresponding to the location of said last previouslyselected printout element and for storing furnishing a second selectionsignal having an amplitude corresponding to the location of saidselected printout element; said selection signal furnishing meanscomprising means for generating a code combination signal correspondingto the location of said selected printout element, and digital-to-analogconverter means for converting said code combination signal to acorresponding analog signal; comparator means for furnishing adifference signal thus furnishing said selection selection signal,having an amplitude corresponding to the difference in amplitude betweensaid first and second selection signals; timing means for furnishing aplurality of timing signals at predetermined time intervals after saidactivation of said last previously selected printout element; means forselecting one of said timing signals as a function of the amplitude ofsaid difference signal, thus furnishing a selected timing signal; andactivating means for activating said selected printout element inresponse to said selected timing signal.
 2. A system as set forth inclaim 1, wherein said storage means comprises first and secondcapacitive storage means for storing said first and second selectionsignals second selection signal; further comprising connecting means foralternately connecting said first and second capacitive storage means tothe output of said digital-to-analog converter means in such a mannerthat the voltage on said first and second capacitive storage meansrespectively constitutes said first and second selection signals. 3.Control system as set forth in claim 2 wherein said comparator meanscomprise differential amplifier means having a first input connected tosaid first capacitive storage means and a second input connected to saidsecond capacitive storage means.
 4. A system as set forth in claim 3,wherein said means for selecting one of said timing signals comprises aplurality of threshold circuits, each connected to said differentialamplifier means, each for generating a corresponding threshold signalwhen the amplitude of said difference signal exceeds the correspondingassociated threshold value; wherein said timing means comprise aplurality of timing circuit means; and wherein said means for selectingone of said timing signals further comprises a plurality of gatingmeans, each connected to a corresponding one of said timing circuits,each adapted to allow transmission of the corresponding timing signal inresponse to a predetermined combination of said threshold signals.
 5. Acontrol system as set forth in claim 4 wherein said gating meanscomprise AND gates.
 6. A control system as set forth in claim 5 whereineach of said timing circuit means comprises a monostable multivibrator.7. A system as set forth in claim 6, wherein said connecting means foralternately connecting said first and second capacitive storage means tosaid digital to analog converter means comprises first and second relaymeans respectively having a first and second pair of relay contacts,said first and second pair of relay contacts, when closed, respectivelyfurnishing the connection between said digital-to-analog converter meansand said first and second capacitive storage means; means for furnishingsignals signifying the generation of a selection signal; and relayactivating means for alternately activating said first and second relaysin response to said signals.
 8. In a printout mechanism having aplurality of printout elements arranged in predetermined locations, amethod for controlling the time interval between activation of a firstand second printout element, in dependence on the relative location ofsaid first and second Printout elements, comprising, in combination,furnishing a first digital signal corresponding to the location of saidfirst printout element; converting said first digital signal to a firstanalog signal having an amplitude corresponding to the location of saidfirst printout element; storing said first analog signal; activatingsaid first printout element; furnishing a second digital signalcorresponding to the location of said second printout element;converting said second digital signal to a second analog signal havingan amplitude corresponding thereto; storing said second analog signal;comparing said first and second analog signals and furnishing adifference signal having an amplitude corresponding to the difference inamplitude between said first and second analog signals; furnishing aplurality of timing signals following activation of said first printoutelement; selecting one of said timing signals as a function of theamplitude of said difference signal; and activating said second printoutelement in response to said selected timing signal.